The present invention relates to an electronic component integrated module and a method for fabricating an electronic component integrated module, and more particularly, it relates to an electronic component integrated module in which an electronic component is encapsulated with a resin and a method for fabricating the same.
Recently, in accordance with reduction in the size and weight of electronic equipment such as a cellular phone and a data communication terminal, there are increasing demands for reduction in the size and weight of module products included in the electronic equipment. In such a module product, an IC chip (a semiconductor device) and a chip component (a surface mount electronic component) are provided on a substrate with an epoxy adhesive, and the IC chip and the chip component are encapsulated with an encapsulating resin for protection (see, for example, Japanese Laid-Open Patent Publication No. 2002-190564).
Such a module product is provided on electronic equipment through secondary packaging reflow on a mother board (a packaging substrate) of the electronic equipment. Herein, a method of packaging a module product on a mother board of electronic equipment or the like with solder is designated as “secondary packaging reflow”, and a method of providing an IC chip or the like on a substrate with solder in fabrication of a module product is designated simply as “packaging reflow”. In some cases, solder included in the module product may be re-melted during the secondary packaging reflow, which may cause a failure such as short-circuit. The short-circuit seems to be caused as follows: When the solder is re-melted, melting expansion pressure is caused in the solder, and a space is formed between the upper face of the chip component and the encapsulating resin by the melting expansion pressure. Therefore, the re-melted solder flows into the space in the form of flush, so as to connect end terminals of the chip component.
In order to solve this problem, use of a low-stress resin as the encapsulating resin has been proposed (see, for example, Japanese Laid-Open Patent Publication No. 2002-208668). According to the description of Japanese Laid-Open Patent Publication No. 2002-208668, when a low-stress resin is used as the encapsulating resin, the melting expansion pressure caused in the re-melting of solder is reduced, resulting in preventing a space from being formed between the upper face of the chip component and the encapsulating resin.
Furthermore, in order to meet recent demands for reduction in cost and weight of electronic equipment, substrates used in module products have been changed from ceramic wiring boards to organic wiring boards. When an organic wiring board is used, however, the moisture absorption of the substrate is increased as compared with the case where a ceramic wiring board is used. Therefore, it is apprehended that the organic wiring board absorbs moisture of the air during the fabrication or storage of the module product, and thus, the reflow resistance and the humidity resistance of the module product are degraded.
Moreover, when a voltage is applied between terminals (electrodes) of the chip component, the solder may migrate between the terminals of the chip component, and in such a case, short-circuit is disadvantageously caused between the terminals of the chip component.